13 search results - page 3 / 3 » Clock buffer and wire sizing using sequential programming |
ICCAD
2004
IEEE
14 years 1 months ago
2004
IEEE
Wire pipelining emerges as a new necessity for global wires due to increasing wire delay, shrinking clock period and growing chip size. Existing approaches on wire pipelining are ...
FCCM
2000
IEEE
13 years 9 months ago
2000
IEEE
Simplifying the programming models is paramount to the success of reconfigurable computing. We apply the principles of object-oriented programming to the design of stream archite...
SPAA
2009
ACM
14 years 5 months ago
2009
ACM
Thread-level speculation (TLS) is a technique that allows parts of a sequential program to be executed in parallel. TLS ensures the parallel program's behaviour remains true ...