14 search results - page 3 / 3 » Clock-tree power optimization based on RTL clock-gating |
ISLPED
1996
ACM
13 years 8 months ago
1996
ACM
Estimation of the area complexity of a Boolean function from its functional description is an important step towards a power estimation capability at the register transfer level (...
ICCAD
1997
IEEE
13 years 8 months ago
1997
IEEE
The relentless push for high performance in custom digital circuits has led to renewed emphasis on circuit optimization or tuning. The parameters of the optimization are typically...
DATE
2006
IEEE
13 years 10 months ago
2006
IEEE
Cutting-edge applications of future embedded systems demand highest processor performance with low power consumption to get acceptable battery-life times. Therefore, low power opt...
ICCAD
1997
IEEE
13 years 8 months ago
1997
IEEE
High-level power estimation, when given only a high-level design specification such as a functional or RTL description, requires high-level estimation of the circuit average acti...