4 search results - page 1 / 1 » Closed-form solution for timing analysis of process variatio... |
SLIP
2009
ACM
13 years 11 months ago
2009
ACM
In this paper, a comprehensive and fast method is presented for the timing analysis of process variations on single-walled carbon nanotube (SWCNT) bundles. Unlike previous works t...
ISVLSI
2007
IEEE
13 years 10 months ago
2007
IEEE
As CMOS technology continues to scale, copper interconnect (CuI) will hinder the performance and reliability of Field Programmable Gate Arrays (FPGA) motivating the need for alter...
DATE
2005
IEEE
13 years 10 months ago
2005
IEEE
A comprehensive probabilistic methodology is proposed to solve the buffer insertion problem with the consideration of process variations. In contrast to a recent work, we point o...
TVLSI
2008
13 years 4 months ago
2008
As CMOS technology scales deeper into the nanometer regime, factors such as leakage power and chip temperature emerge as critically important concerns for high-performance VLSI des...