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ASPLOS
1992
ACM
13 years 8 months ago
Closing the Window of Vulnerability in Multiphase Memory Transactions
Multiprocessor architects have begun to explore several mechanisms such as prefetching, context-switching and software-assisted dynamic cache-coherence, which transform single-pha...
John Kubiatowicz, David Chaiken, Anant Agarwal
ICECCS
2010
IEEE
196views Hardware» more  ICECCS 2010»
13 years 5 months ago
Implementing and Evaluating a Model Checker for Transactional Memory Systems
Abstract—Transactional Memory (TM) is a promising technique that addresses the difficulty of parallel programming. Since TM takes responsibility for all concurrency control, TM ...
Woongki Baek, Nathan Grasso Bronson, Christos Kozy...
ICDCS
2008
IEEE
13 years 11 months ago
Strong WORM
We introduce a Write-Once Read-Many (WORM) storage system providing strong assurances of data retention and compliant migration, by leveraging trusted secure hardware in close dat...
Radu Sion