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MICRO
2010
IEEE
170views Hardware» more  MICRO 2010»
13 years 2 months ago
Tolerating Concurrency Bugs Using Transactions as Lifeguards
Abstract--Parallel programming is hard, because it is impractical to test all possible thread interleavings. One promising approach to improve a multi-threaded program's relia...
Jie Yu, Satish Narayanasamy
SAMOS
2010
Springer
13 years 2 months ago
Interleaving granularity on high bandwidth memory architecture for CMPs
—Memory bandwidth has always been a critical factor for the performance of many data intensive applications. The increasing processor performance, and the advert of single chip m...
Felipe Cabarcas, Alejandro Rico, Yoav Etsion, Alex...
CODES
2000
IEEE
13 years 9 months ago
Co-design of interleaved memory systems
Memory interleaving is a cost-efficient approach to increase bandwidth. Improving data access locality and reducing memory access conflicts are two important aspects to achieve hi...
Hua Lin, Wayne Wolf
VLSISP
2008
139views more  VLSISP 2008»
13 years 4 months ago
Fault Tolerance Analysis of Communication System Interleavers: the 802.11a Case Study
The study of Multiple Soft errors on memory modules caused by radiation effects represents an interesting field of current research. The fault tolerance of these devices in radiati...
Pilar Reyes, Pedro Reviriego, Juan Antonio Maestro...
HIPC
2007
Springer
13 years 10 months ago
Self-optimization of Performance-per-Watt for Interleaved Memory Systems
- With the increased complexity of platforms coupled with data centers’ servers sprawl, power consumption is reaching unsustainable limits. Memory is an important target for plat...
Bithika Khargharia, Salim Hariri, Mazin S. Yousif