79 search results - page 2 / 16 » Code Compression for VLIW Processors Using Variable-to-Fixed... |
HPCA
1997
IEEE
13 years 9 months ago
1997
IEEE
This paper represents a design study of the datapath for a very long instruction word (VLIW) video signal processor (VSP). VLIW architectures provide high parallelism and excellen...
CODES
2007
IEEE
13 years 11 months ago
2007
IEEE
This paper proposes a low power VLIW processor generation method by automatically extracting non-redundant activation conditions of pipeline registers for clock gating. It is impo...
TCAD
1998
13 years 4 months ago
1998
We address the problem of code size minimization in VLSI systems with embedded DSP processors. Reducing code size reduces the production cost of embedded systems. We use data comp...
LCTRTS
2007
Springer
13 years 11 months ago
2007
Springer
The run-time performance of VLIW (very long instruction word) microprocessors depends heavily on the effectiveness of its associated optimizing compiler. Typical VLIW compiler pha...
DCC
2003
IEEE
14 years 4 months ago
2003
IEEE
Embedded computing systems are space and cost sensitive; memory is one of the most restricted resources, posing serious constraints on program size. Code compression, which is a s...