32 search results - page 3 / 7 » Combining Decision Diagrams and SAT Procedures for Efficient... |
ASPDAC
2007
ACM
13 years 9 months ago
2007
ACM
This paper presents a Boolean based symbolic model checking algorithm for the verification of analog/mixedsignal (AMS) circuits. The systems are modeled in VHDL-AMS, a hardware des...
DSD
2006
IEEE
13 years 11 months ago
2006
IEEE
Recently, a number of works have been published on implementing assignment decision diagram models combined with SAT methods to address register-transfer level test pattern genera...
FMCAD
2004
Springer
13 years 10 months ago
2004
Springer
Most symbolic model checkers are based on either Binary Decision Diagrams (BDDs), which may grow exponentially large, or Satisfiability (SAT) solvers, whose time requirements rapi...
ENTCS
2006
13 years 5 months ago
2006
Abstract. Nelson and Oppen provided a methodology for modularly combining decision procedures for individual theories to construct a decision procedure for a combination of theorie...
APN
2008
Springer
13 years 7 months ago
2008
Springer
Model checking is a powerful and widespread technique for the verification of finite distributed systems. However, the main hindrance for wider application of this technique is the...