This paper presents a two-part study on managing distributed NUCA (Non-Uniform Cache Architecture) L2 caches in a future manycore processor to obtain high singlethread program per...
In this paper, we propose Runahead Threads (RaT) as a valuable solution for both reducing resource contention and exploiting memory-level parallelism in Simultaneous Multithreaded...
Abstract. This paper proposes two compiler-assisted techniques to improve thread level control speculation in speculative multithreading executions. The first technique is to incr...
Recent research suggests that DSM clusters can benefit from parallel coherence controllers. Parallel controllers require address partitioning and synchronization to avoid handlin...
Executing subordinate activities by pushing return addresses on the stack is the most e cient working mode for sequential programs. It is supported by all current processors, yet i...