99 search results - page 19 / 20 » Communication-efficient hardware acceleration for fast funct... |
ISCA
2003
IEEE
13 years 10 months ago
2003
IEEE
To achieve high instruction throughput, instruction schedulers must be capable of producing high-quality schedules that maximize functional unit utilization while at the same time...
ICCAD
2010
IEEE
13 years 2 months ago
2010
IEEE
Abstract--We present a methodology for implementing digital signal processing (DSP) operations such as filtering with biomolecular reactions. From a DSP specification, we demonstra...
CODES
1999
IEEE
13 years 9 months ago
1999
IEEE
o much higher levels of abstraction than today's design practices, which are usually at the level of synthesizable RTL for custom hardware or Instruction Set Simulator (ISS) f...
CISS
2008
IEEE
13 years 11 months ago
2008
IEEE
— In this paper, we study the problem of distributed detection in the presence of unknown carrier frequency offset (CFO) and initial phase, the issue we encounter in the emerging...
ASPDAC
2007
ACM
13 years 8 months ago
2007
ACM
Abstract-- SAT sweeping is the process of merging two or more functionally equivalent nodes in a circuit by selecting one of them to represent all the other equivalent nodes. This ...