42 search results - page 7 / 9 » Comparing Static and Dynamic Code Scheduling for Multiple-In... |
LCPC
2000
Springer
13 years 9 months ago
2000
Springer
This paper proposes a simple and efficient implementation method for a hierarchical coarse grain task parallel processing scheme on a SMP machine. OSCAR multigrain parallelizing c...
PPOPP
2010
ACM
14 years 2 months ago
2010
ACM
We present Lazy Binary Splitting (LBS), a user-level scheduler of nested parallelism for shared-memory multiprocessors that builds on existing Eager Binary Splitting work-stealing...
CODES
2007
IEEE
13 years 11 months ago
2007
IEEE
We present a dynamic optimization technique, thread warping, that uses a single processor on a multiprocessor system to dynamically synthesize threads into custom accelerator circ...
HPCA
2007
IEEE
14 years 5 months ago
2007
IEEE
This paper evaluates the suitability of the MapReduce model for multi-core and multi-processor systems. MapReduce was created by Google for application development on data-centers...
ECRTS
2006
IEEE
13 years 11 months ago
2006
IEEE
Cache memories have been extensively used to bridge the gap between high speed processors and relatively slower main memories. However, they are sources of predictability problems...