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DATE
2008
IEEE
105views Hardware» more  DATE 2008»
13 years 11 months ago
Comparison of Boolean Satisfiability Encodings on FPGA Detailed Routing Problems
We compare 12 new encodings for representing of FPGA detailed routing problems as equivalent Boolean Satisfiability (SAT) problems against the only 2 previously used encodings. We...
Miroslav N. Velev, Ping Gao 0002
VLSID
1999
IEEE
100views VLSI» more  VLSID 1999»
13 years 9 months ago
Satisfiability-Based Detailed FPGA Routing
In this paper we address the problem of detailed FPGA routing using Boolean formulation methods. In the context of FPGA routing where routing resources are fixed, Boolean formulat...
Gi-Joon Nam, Karem A. Sakallah, Rob A. Rutenbar
ICCAD
2002
IEEE
227views Hardware» more  ICCAD 2002»
14 years 2 months ago
Generic ILP versus specialized 0-1 ILP: an update
Optimized solvers for the Boolean Satisfiability (SAT) problem have many applications in areas such as hardware and software verification, FPGA routing, planning, etc. Further use...
Fadi A. Aloul, Arathi Ramani, Igor L. Markov, Kare...