39 search results - page 7 / 8 » Compiler Generated Multithreading to Alleviate Memory Latenc... |
ICS
1999
Tsinghua U.
13 years 10 months ago
1999
Tsinghua U.
This paper presents a technique, adaptive replication, for automatically eliminating synchronization bottlenecks in multithreaded programs that perform atomic operations on object...
ISCA
2003
IEEE
13 years 11 months ago
2003
IEEE
Despite large caches, main-memory access latencies still cause significant performance losses in many applications. Numerous hardware and software prefetching schemes tolerate th...
CASES
2007
ACM
13 years 10 months ago
2007
ACM
In this paper we describe the design and implementation of a flexible, and extensible, just-in-time ARM simulator designed to run co-operatively with a multi-core DSP simulator on...
IWOMP
2007
Springer
14 years 4 days ago
2007
Springer
The Cell processor is a heterogeneous multi-core processor with one Power Processing Engine (PPE) core and eight Synergistic Processing Engine (SPE) cores. Each SPE has a directly...
ISLPED
2005
ACM
13 years 11 months ago
2005
ACM
In this paper, we take the idea of application-level processing on disks to one level further, and focus on an architecture, called Cluster of Active Disks (CAD), where the storag...