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ICCAD
2001
IEEE
184views Hardware» more  ICCAD 2001»
14 years 2 months ago
CALiBeR: A Software Pipelining Algorithm for Clustered Embedded VLIW Processors
In this paper we describe a software pipelining framework, CALiBeR (Cluster Aware Load Balancing Retiming Algorithm), suitable for compilers targeting clustered embedded VLIW proc...
Cagdas Akturan, Margarida F. Jacome
MICRO
2006
IEEE
73views Hardware» more  MICRO 2006»
13 years 11 months ago
Merging Head and Tail Duplication for Convergent Hyperblock Formation
VLIW and EDGE (Explicit Data Graph Execution) architectures rely on compilers to form high-quality hyperblocks for good performance. These compilers typically perform hyperblock f...
Bertrand A. Maher, Aaron Smith, Doug Burger, Kathr...
CP
2008
Springer
13 years 7 months ago
An Application of Constraint Programming to Superblock Instruction Scheduling
Modern computer architectures have complex features that can only be fully taken advantage of if the compiler schedules the compiled code. A standard region of code for scheduling ...
Abid M. Malik, Michael Chase, Tyrel Russell, Peter...
PLDI
2004
ACM
13 years 10 months ago
Fast searches for effective optimization phase sequences
It has long been known that a fixed ordering of optimization phases will not produce the best code for every application. One approach for addressing this phase ordering problem ...
Prasad Kulkarni, Stephen Hines, Jason Hiser, David...
APLAS
2006
ACM
13 years 9 months ago
Combining Offline and Online Optimizations: Register Allocation and Method Inlining
Abstract. Fast dynamic compilers trade code quality for short compilation time in order to balance application performance and startup time. This paper investigates the interplay o...
Hiroshi Yamauchi, Jan Vitek