22 search results - page 1 / 5 » Compiler parallelization of C programs for multi-core DSPs w... |
CODES
2003
IEEE
13 years 10 months ago
2003
IEEE
ICASSP
2008
IEEE
13 years 11 months ago
2008
IEEE
Multiple memory banks design is employed in many high performance DSP processors. This architectural feature supports higher memory bandwidth by allowing multiple data memory acce...
MICRO
2007
IEEE
13 years 11 months ago
2007
IEEE
Single-threaded programming is already considered a complicated task. The move to multi-threaded programming only increases the complexity and cost involved in software developmen...
ISSAC
2007
Springer
13 years 11 months ago
2007
Springer
Partitioned Global Address Space (PGAS) languages combine the programming convenience of shared memory with the locality and performance control of message passing. One such langu...
ICS
2004
Tsinghua U.
13 years 10 months ago
2004
Tsinghua U.
The Cray X1 was recently introduced as the first in a new line of parallel systems to combine high-bandwidth vector processing with an MPP system architecture. Alongside capabili...