18 search results - page 1 / 4 » Compiler-assisted dynamic scheduling for effective paralleli... |
PPOPP
2009
ACM
14 years 4 months ago
2009
ACM
Recent advances in polyhedral compilation technology have made it feasible to automatically transform affine sequential loop nests for tiled parallel execution on multi-core proce...
IPPS
2010
IEEE
13 years 2 months ago
2010
IEEE
Abstract--Loop tiling is an important compiler transformation used for enhancing data locality and exploiting coarsegrained parallelism. Tiled codes in which tile sizes are runtime...
TPDS
2010
13 years 2 months ago
2010
—Thread-level parallelism (TLP) has been extensively studied in order to overcome the limitations of exploiting instruction-level parallelism (ILP) on high-performance superscala...
CASES
2001
ACM
13 years 8 months ago
2001
ACM
With the widening performance gap between processors and main memory, efficient memory accessing behavior is necessary for good program performance. Loop partition is an effective...
ICPP
2008
IEEE
13 years 10 months ago
2008
IEEE
This paper describes a generalisation of modulo scheduling to parallelise loops for SpMT processors that exploits simultaneously both instruction-level parallelism and thread-leve...