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» Compiling SA-C Programs to FPGAs: Performance Results
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CGO
2006
IEEE
13 years 12 months ago
Thread-Shared Software Code Caches
Software code caches are increasingly being used to amortize the runtime overhead of dynamic optimizers, simulators, emulators, dynamic translators, dynamic compilers, and other t...
Derek Bruening, Vladimir Kiriansky, Timothy Garnet...
ICS
1999
Tsinghua U.
13 years 10 months ago
Software trace cache
—This paper explores the use of compiler optimizations which optimize the layout of instructions in memory. The target is to enable the code to make better use of the underlying ...
Alex Ramírez, Josep-Lluis Larriba-Pey, Carl...
ISCAPDCS
2007
13 years 7 months ago
Evaluation of architectural support for speech codecs application in large-scale parallel machines
— Next generation multimedia mobile phones that use the high bandwidth 3G cellular radio network consume more power. Multimedia algorithms such as speech, video transcodecs have ...
Naeem Zafar Azeemi
SAS
1999
Springer
106views Formal Methods» more  SAS 1999»
13 years 10 months ago
Translating Out of Static Single Assignment Form
Programs represented in Static Single Assignment (SSA) form contain phi instructions (or functions) whose operational semantics are to merge values coming from distinct control flo...
Vugranam C. Sreedhar, Roy Dz-Ching Ju, David M. Gi...
CODES
2007
IEEE
14 years 4 days ago
Compile-time decided instruction cache locking using worst-case execution paths
Caches are notorious for their unpredictability. It is difficult or even impossible to predict if a memory access results in a definite cache hit or miss. This unpredictability i...
Heiko Falk, Sascha Plazar, Henrik Theiling