2 search results - page 1 / 1 » Complexity Of Minimum-Delay Gate Resizing |
VLSID
2001
IEEE
14 years 4 months ago
2001
IEEE
ICCAD
1999
IEEE
13 years 8 months ago
1999
IEEE
Typically,cell parameterssuch as the pin-to-pinintrinsicdelays, load-dependentcoe cients,andinputpin capacitanceshavedifferent values for rising and falling signals. The performan...