8 search results - page 1 / 2 » Complexity of Scheduling in Synthesizing Hardware from Concu... |
DAGSTUHL
2007
13 years 6 months ago
2007
LCTRTS
2010
Springer
13 years 2 months ago
2010
Springer
Concurrent Action-Oriented Specifications (CAOS) model the behavior of a synchronous hardware circuit as asynchronous guarded at an abstraction level higher than the Register Tran...
DATE
1999
IEEE
13 years 9 months ago
1999
IEEE
In this paper, new and efficient BIST methodology and BIST hardware insertion algorithms are presented for RTL data paths obtained from high level synthesis. The methodology is ba...
ICCAD
1994
IEEE
13 years 9 months ago
1994
IEEE
We present in this paper a novel control synthesis technique for system-level specifications that are better described as a set of concurrent synchronous descriptions, their synch...
RV
2010
Springer
13 years 2 months ago
2010
Springer
The RV system is the first system to merge the benefits of Runtime Monitoring with Predictive Analysis. The Runtime Monitoring portion of RV is based on the successful Monitoring O...