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ISCA
2012
IEEE
260views Hardware» more  ISCA 2012»
11 years 8 months ago
A case for exploiting subarray-level parallelism (SALP) in DRAM
Modern DRAMs have multiple banks to serve multiple memory requests in parallel. However, when two requests go to the same bank, they have to be served serially, exacerbating the h...
Yoongu Kim, Vivek Seshadri, Donghyuk Lee, Jamie Li...
ICS
2009
Tsinghua U.
14 years 17 days ago
Less reused filter: improving l2 cache performance via filtering less reused lines
The L2 cache is commonly managed using LRU policy. For workloads that have a working set larger than L2 cache, LRU behaves poorly, resulting in a great number of less reused lines...
Lingxiang Xiang, Tianzhou Chen, Qingsong Shi, Wei ...