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ISCA
2000
IEEE
105views Hardware» more  ISCA 2000»
13 years 10 months ago
Multiple-banked register file architectures
The register file access time is one of the critical delays in current superscalar processors. Its impact on processor performance is likely to increase in future processor genera...
José-Lorenzo Cruz, Antonio González,...
SC
2000
ACM
13 years 10 months ago
Performance of Hybrid Message-Passing and Shared-Memory Parallelism for Discrete Element Modeling
The current trend in HPC hardware is towards clusters of shared-memory (SMP) compute nodes. For applications developers the major question is how best to program these SMP cluster...
D. S. Henty
ECCV
2010
Springer
13 years 10 months ago
Hough Transform and 3D SURF for robust three dimensional classification
Most methods for the recognition of shape classes from 3D datasets focus on classifying clean, often manually generated models. However, 3D shapes obtained through acquisition tech...
EH
1999
IEEE
351views Hardware» more  EH 1999»
13 years 10 months ago
Evolvable Hardware or Learning Hardware? Induction of State Machines from Temporal Logic Constraints
Here we advocate an approach to learning hardware based on induction of finite state machines from temporal logic constraints. The method involves training on examples, constraint...
Marek A. Perkowski, Alan Mishchenko, Anatoli N. Ch...
MOBICOM
2004
ACM
13 years 11 months ago
The changing usage of a mature campus-wide wireless network
Wireless Local Area Networks (WLANs) are now commonplace on many academic and corporate campuses. As “Wi-Fi” technology becomes ubiquitous, it is increasingly important to und...
Tristan Henderson, David Kotz, Ilya Abyzov