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MICRO
2009
IEEE
134views Hardware» more  MICRO 2009»
13 years 12 months ago
Coordinated control of multiple prefetchers in multi-core systems
Aggressive prefetching is very beneficial for memory latency tolerance of many applications. However, it faces significant challenges in multi-core systems. Prefetchers of diff...
Eiman Ebrahimi, Onur Mutlu, Chang Joo Lee, Yale N....
CSE
2011
IEEE
12 years 5 months ago
Performance Enhancement of Network Devices with Multi-Core Processors
— In network based applications, packet capture is the main area that attracts many researchers in developing traffic monitoring systems. Along with the packet capture, many othe...
Nhat-Phuong Tran, Sugwon Hong, Myungho Lee, Seung-...
MVA
2007
174views Computer Vision» more  MVA 2007»
13 years 6 months ago
A Real-Time Hand Gesture Interface Implemented on a Multi-Core Processor
This paper describes a real-time hand gesture recognition system and its application to VCR remote control. Cascaded classifiers are used to detect a number of different hand pose...
Tsukasa Ike, Nobuhisa Kishikawa, Björn Stenge...
RTSS
2009
IEEE
13 years 12 months ago
Timing Analysis of Concurrent Programs Running on Shared Cache Multi-Cores
—Memory accesses form an important source of timing unpredictability. Timing analysis of real-time embedded software thus requires bounding the time for memory accesses. Multipro...
Yan Li, Vivy Suhendra, Yun Liang, Tulika Mitra, Ab...
ICDCS
2008
IEEE
13 years 11 months ago
PFC: Transparent Optimization of Existing Prefetching Strategies for Multi-Level Storage Systems
The multi-level storage architecture has been widely adopted in servers and data centers. However, while prefetching has been shown as a crucial technique to exploit the sequentia...
Zhe Zhang, Kyuhyung Lee, Xiaosong Ma, Yuanyuan Zho...