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» Coordinated resource optimization in behavioral synthesis
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DATE
2010
IEEE
193views Hardware» more  DATE 2010»
13 years 9 months ago
Coordinated resource optimization in behavioral synthesis
Abstract—Reducing resource usage is one of the most important optimization objectives in behavioral synthesis due to its direct impact on power, performance and cost. The datapat...
Jason Cong, Bin Liu, Junjuan Xu
DAC
2000
ACM
14 years 5 months ago
Synthesis and optimization of coordination controllers for distributed embedded systems
A main advantage of control composition with modal processes [4] is the enhanced retargetability of the composed behavior over a wide variety of target architectures. Unlike previ...
Pai H. Chou, Gaetano Borriello
FPGA
2008
ACM
174views FPGA» more  FPGA 2008»
13 years 6 months ago
Pattern-based behavior synthesis for FPGA resource reduction
Pattern-based synthesis has drawn wide interest from researchers who tried to utilize the regularity in applications for design optimizations. In this paper we present a general p...
Jason Cong, Wei Jiang
DAC
1998
ACM
13 years 8 months ago
Synthesis of Power-Optimized and Area-Optimized Circuits from Hierarchical Behavioral Descriptions
We present a technique for synthesizing power- as well as area-optimized circuits from hierarchical data flow graphs under throughput constraints. We allow for the use of complex...
Ganesh Lakshminarayana, Niraj K. Jha
ASPDAC
2009
ACM
155views Hardware» more  ASPDAC 2009»
13 years 11 months ago
Variation-aware resource sharing and binding in behavioral synthesis
— As technology scales, the delay uncertainty caused by process variations has become increasingly pronounced in deep submicron designs. In the presence of process variations, wo...
Feng Wang 0004, Yuan Xie, Andres Takach