Sciweavers

548 search results - page 3 / 110
» Core-Selectability in Chip Multiprocessors
Sort
View
INTEGRATION
2010
70views more  INTEGRATION 2010»
13 years 3 months ago
Thermal modeling and analysis of 3D multi-processor chips
José L. Ayala, Arvind Sridhar, David Cuesta
TACO
2010
75views more  TACO 2010»
13 years 3 months ago
An analysis of on-chip interconnection networks for large-scale chip multiprocessors
Daniel Sanchez, George Michelogiannakis, Christos ...
HPCA
2011
IEEE
12 years 9 months ago
HAQu: Hardware-accelerated queueing for fine-grained threading on a chip multiprocessor
Queues are commonly used in multithreaded programs for synchronization and communication. However, because software queues tend to be too expensive to support finegrained paralle...
Sanghoon Lee, Devesh Tiwari, Yan Solihin, James Tu...
TJS
2010
145views more  TJS 2010»
12 years 12 months ago
Analyzing and enhancing the parallel sort operation on multithreaded architectures
The Sort operation is a core part of many critical applications. Despite the large efforts to parallelize it, the fact that it suffers from high data-dependencies vastly limits it...
Layali K. Rashid, Wessam Hassanein, Moustafa A. Ha...
ASPDAC
2007
ACM
133views Hardware» more  ASPDAC 2007»
13 years 9 months ago
RTOS and Codesign Toolkit for Multiprocessor Systems-on-Chip
Abstract-- Multiprocessor designs have become popular in embedded domains for achieving the power and performance requirements. In this paper, we present principles and techniques ...
Shinya Honda, Hiroyuki Tomiyama, Hiroaki Takada