27 search results - page 2 / 6 » Core-aware memory access scheduling schemes |
SAC
2008
ACM
13 years 4 months ago
2008
ACM
To use multiple memory banks in parallel is a nature approach to boost the performance of flash-memory storage systems. However, realistic data-access localities unevenly load eac...
IPPS
2010
IEEE
13 years 3 months ago
2010
IEEE
With wide adoption of chip multiprocessors (CMPs) in modern computers, there is an increasing demand for large capacity main memory systems. The emerging PCM (Phase Change Memory) ...
ICCAD
2009
IEEE
13 years 3 months ago
2009
IEEE
Hardware acceleration is crucial in modern embedded system design to meet the explosive demands on performance and cost. Selected computation kernels for acceleration are usually ...
DAC
2006
ACM
14 years 6 months ago
2006
ACM
Transistor leakage is poised to become the dominant source of power dissipation in digital systems, and reconfigurable devices are not immune to this problem. Modern FPGAs already...
TC
1998
13 years 5 months ago
1998
—We evaluate three extensions to directory-based cache coherence protocols in shared-memory multiprocessors. These extensions are aimed at reducing the penalties associated with ...