5 search results - page 1 / 1 » Cost Effective Memory Dependence Prediction using Speculatio... |
IEEEPACT
2002
IEEE
13 years 9 months ago
2002
IEEE
Memory dependence prediction allows out-of-order issue processors to achieve high degrees of instruction level parallelism by issuing load instructions at the earliest time withou...
HPCA
2006
IEEE
14 years 4 months ago
2006
IEEE
Allowing loads to issue out-of-order with respect to earlier unresolved store addresses is very important for extracting parallelism in large-window superscalar processors. Blindl...
PLDI
2004
ACM
13 years 10 months ago
2004
ACM
Although dynamic program slicing was first introduced to aid in user level debugging, applications aimed at improving software quality, reliability, security, and performance hav...
HPCA
2003
IEEE
14 years 4 months ago
2003
IEEE
With the constant advances in technology that lead to the increasing of the transistor count and processor frequency, power dissipation is becoming one of the major issues in high...
ISCA
2000
IEEE
13 years 9 months ago
2000
IEEE
For many applications, branch mispredictions and cache misses limit a processor’s performance to a level well below its peak instruction throughput. A small fraction of static i...