29 search results - page 1 / 6 » Counting in the Presence of Memory Faults |
ISAAC
2009
Springer
13 years 11 months ago
2009
Springer
The faulty memory RAM presented by Finocchi and Italiano [1] is a variant of the RAM model where the content of any memory cell can get corrupted at any time, and corrupted cells c...
STOC
2004
ACM
14 years 5 months ago
2004
ACM
We investigate the design of algorithms resilient to memory faults, i.e., algorithms that, despite the corruption of some memory values during their execution, are able to produce...
ESA
2006
Springer
13 years 8 months ago
2006
Springer
We address the problem of sorting in the presence of faults that may arbitrarily corrupt memory locations, and investigate the impact of memory faults both on the correctness and ...
IOLTS
2006
IEEE
13 years 11 months ago
2006
IEEE
FPGA emulation has proven to be a performance effective method to analyse the behaviour of digital circuits in the presence of soft errors due to SEU effects. In particular, the r...
TEC
2002
13 years 4 months ago
2002
A novel approach to hardware fault tolerance is demonstrated that takes inspiration from the human immune system as a method of fault detection. The human immune system is a remark...