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ICCAD
2000
IEEE
148views Hardware» more  ICCAD 2000»
13 years 9 months ago
Coupling-Driven Signal Encoding Scheme for Low-Power Interface Design
Coupling effects between on-chip interconnects must be addressed in ultra deep submicron VLSI and system-on-a-chip (SoC) designs. A new low-power bus encoding scheme is proposed t...
Ki-Wook Kim, Kwang-Hyun Baek, Naresh R. Shanbhag, ...
PATMOS
2004
Springer
13 years 10 months ago
A Dual Low Power and Crosstalk Immune Encoding Scheme for System-on-Chip Buses
Abstract. Crosstalk causes logical errors due to data dependent delay degradation as well as energy consumption and is considered the biggest signal integrity challenge for long on...
Zahid Khan, Tughrul Arslan, Ahmet T. Erdogan
VLSID
2002
IEEE
138views VLSI» more  VLSID 2002»
14 years 5 months ago
ETAM++: Extended Transition Activity Measure for Low Power Address Bus Designs
Interconnection networks in Systems-On-Chip begin to have a non-negligible impact on the power consumption of a whole system. This is because of increasing inter-wire capacitances...
Haris Lekatsas, Jörg Henkel
GLOBECOM
2007
IEEE
13 years 7 months ago
The Quality-Energy Scalable OFDMA Modulation for Low Power Transmitter and VLIW Processor Based Implementation
: The improvement of spectral efficiency comes at the cost of exponential increment of signal processing complexity [1]. Hence, the energy-efficiency of baseband has recently turne...
Min Li, Bruno Bougard, Eduardo Lopez-Estraviz, And...
ICIP
2003
IEEE
14 years 6 months ago
Adaptive system on a chip (ASOC): a backbone for power-aware signal processing cores
For motion estimation (ME) and discrete cosine transform (DCT) of MPEG video encoding, content variation and perceptual tolerance in video signals can be exploited to gracefully t...
Andrew Laffely, Jian Liang, Russell Tessier, Wayne...