2 search results - page 1 / 1 » Critical hazard free test generation for asynchronous circui... |
VTS
1997
IEEE
13 years 9 months ago
1997
IEEE
We describe a technique to generate critical hazard-free tests for self-timed control circuits build using a macromodule library, in a partial scan based DFT environment. Wepropos...
DATE
2008
IEEE
13 years 11 months ago
2008
IEEE
There have been serious concerns recently about the security of microchips from hardware trojan horse insertion during manufacturing. This issue has been raised recently due to ou...