Sciweavers

13 search results - page 2 / 3
» Cryptography with Asynchronous Logic Automata
Sort
View
ACSD
2005
IEEE
162views Hardware» more  ACSD 2005»
13 years 11 months ago
Complexity Results for Checking Distributed Implementability
We consider the distributed implementability problem as: Given a labeled transition system TS together with a distribution ∆ of its actions over a set of processes, does there ex...
Keijo Heljanko, Alin Stefanescu
SCP
2010
172views more  SCP 2010»
13 years 3 months ago
Alternating-time stream logic for multi-agent systems
Constraint automata have been introduced to provide a compositional, operational semantics for the exogenous coordination language Reo, but they can also serve interface specifica...
Sascha Klüppelholz, Christel Baier
ATS
2000
IEEE
134views Hardware» more  ATS 2000»
13 years 9 months ago
Fsimac: a fault simulator for asynchronous sequential circuits
At very high frequencies, the major potential of asynchronous circuits is absence of clock skew and, through that, better exploitation of relative timing relations. This paper pre...
Susmita Sur-Kolay, Marly Roncken, Ken S. Stevens, ...
ICCD
2007
IEEE
206views Hardware» more  ICCD 2007»
14 years 2 months ago
SCAFFI: An intrachip FPGA asynchronous interface based on hard macros
Building fully synchronous VLSI circuits is becoming less viable as circuit geometries evolve. However, before the adoption of purely asynchronous strategies in VLSI design, globa...
Julian J. H. Pontes, Rafael Soares, Ewerson Carval...
CONCUR
1999
Springer
13 years 9 months ago
Partial Order Reduction for Model Checking of Timed Automata
Abstract. The paper presents a partial order reduction method applicable to networks of timed automata. The advantage of the method is that it reduces both the number of explored c...
Marius Minea