48 search results - page 9 / 10 » Customized Algorithms for High Performance Memory Test in Ad... |
ICCAD
2008
IEEE
14 years 3 months ago
2008
IEEE
Abstract— As VLSI technology enters the nanoscale regime, interconnect delay becomes the bottleneck of circuit performance. Compared to gate delays, wires are becoming increasing...
CISS
2008
IEEE
14 years 19 days ago
2008
IEEE
— In this paper, we study the problem of distributed detection in the presence of unknown carrier frequency offset (CFO) and initial phase, the issue we encounter in the emerging...
ICYCS
2008
IEEE
14 years 17 days ago
2008
IEEE
— Nowadays wireless mesh routers are facilitating with more wireless channels than ever because of the advanced wireless communication technologies such as OFDM, SDR and CR(cogni...
DAC
2006
ACM
14 years 7 months ago
2006
ACM
As the technology node advances into the nanometer era, via-open defects are one of the dominant failures. To improve via yield and reliability, redundant-via insertion is a highl...
PVM
1997
Springer
13 years 10 months ago
1997
Springer
The extremely low latencies and high bandwidth results achievable with the Scalable Coherent Interface SCI at lowest level encourages its integration into existing Message Passin...