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ASPDAC
2007
ACM
98views Hardware» more  ASPDAC 2007»
13 years 8 months ago
Cyclic-CPRS : A Diagnosis Technique for BISTed Circuits for Nano-meter Technologies
- A Cyclic-CPRS (Column Parity Row Selection) technique is presented to diagnose built-in self tested (BISTed) circuits, even in the presence of many unknowns and transient errors....
Chun-Yi Lee, Hung-Mao Lin, Fang-Min Wang, James Ch...
IOLTS
2006
IEEE
101views Hardware» more  IOLTS 2006»
13 years 10 months ago
Delay Fault Localization in Test-Per-Scan BIST Using Built-In Delay Sensor
— Delay failures are becoming a dominant failure mechanism in nanometer technologies. Diagnosis of such failures is important to ensure yield and robustness of the design. Howeve...
Swaroop Ghosh, Swarup Bhunia, Arijit Raychowdhury,...
ASPDAC
2007
ACM
144views Hardware» more  ASPDAC 2007»
13 years 8 months ago
Design Methodology for 2.4GHz Dual-Core Microprocessor
This paper presents a design methodology that was applied to the design of a 2.4GHz dual-core SPARC64TM microprocessor with 90nm CMOS technology. It focuses on the newly adopted t...
Noriyuki Ito, Hiroaki Komatsu, Akira Kanuma, Akihi...