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ERSA
2006
161views Hardware» more  ERSA 2006»
13 years 5 months ago
A Parametric Study of Scalable Interconnects on FPGAs
Abstract-- With the constantly increasing gate capacity of FPGAs, a single FPGA chip is able to employ large-scale applications. To connect a large number of computational nodes, N...
Daihan Wang, Hiroki Matsutani, Masato Yoshimi, Mic...
FCCM
2006
IEEE
201views VLSI» more  FCCM 2006»
13 years 8 months ago
Hardware/Software Approach to Molecular Dynamics on Reconfigurable Computers
With advances in reconfigurable hardware, especially field-programmable gate arrays (FPGAs), it has become possible to use reconfigurable hardware to accelerate complex applicatio...
Ronald Scrofano, Maya Gokhale, Frans Trouw, Viktor...
FCCM
2009
IEEE
171views VLSI» more  FCCM 2009»
13 years 11 months ago
Accelerating SPICE Model-Evaluation using FPGAs
—Single-FPGA spatial implementations can provide an order of magnitude speedup over sequential microprocessor implementations for data-parallel, floating-point computation in SP...
Nachiket Kapre, André DeHon
CISIS
2011
IEEE
12 years 4 months ago
Improving Scheduling Techniques in Heterogeneous Systems with Dynamic, On-Line Optimisations
—Computational performance increasingly depends on parallelism, and many systems rely on heterogeneous resources such as GPUs and FPGAs to accelerate computationally intensive ap...
Marcin Bogdanski, Peter R. Lewis, Tobias Becker, X...
FCCM
2006
IEEE
133views VLSI» more  FCCM 2006»
13 years 10 months ago
A Scalable FPGA-based Multiprocessor
It has been shown that a small number of FPGAs can significantly accelerate certain computing tasks by up to two or three orders of magnitude. However, particularly intensive lar...
Arun Patel, Christopher A. Madill, Manuel Salda&nt...