148 search results - page 2 / 30 » DRAMSim2: A Cycle Accurate Memory System Simulator |
ISPASS
2007
IEEE
13 years 12 months ago
2007
IEEE
In this paper, we introduce PTLsim, a cycle accurate full system x86-64 microprocessor simulator and virtual machine. PTLsim models a modern superscalar out of order x86-64 proces...
DATE
2008
IEEE
14 years 1 days ago
2008
IEEE
The following study shows a direct comparison of memory write policies in Shared Memory Multicore Systems. Although there are much work and many studies about this issue, our work...
DATE
2005
IEEE
13 years 11 months ago
2005
IEEE
In this paper, the application of a cycle accurate binary translator for rapid prototyping of SoCs will be presented. This translator generates code to run on a rapid prototyping ...
NOCS
2007
IEEE
13 years 12 months ago
2007
IEEE
Network-on-Chip (NoC) architectures have a wide variety of parameters that can be adapted to the designer’s requirements. Fast exploration of this parameter space is only possib...
3DIC
2009
IEEE
13 years 10 months ago
2009
IEEE
Several forms of processor memory organizations have been in use to optimally access off-chip memory systems mainly the Hard disk drives (HDD). Recent trends show that the solid s...