3 search results - page 1 / 1 » DSPstone Benchmark of CoDeL's Automated Clock Gating Platfor... |
SAMOS
2007
Springer
13 years 10 months ago
2007
Springer
In this paper, we use the CoDeL hardware design platform to analyze the potential and performance impact of power gating individual registers. For each register, we examine the per...
ISVLSI
2007
IEEE
13 years 10 months ago
2007
IEEE
— We present a performance analysis of CoDeL, a highly efficient automated clock gating platform for rapidly developing power efficient hardware architectures. It automatically...
ISCAS
2007
IEEE
13 years 10 months ago
2007
IEEE
— In this paper, we use the CoDeL platform to develop test circuits and analyze the potential and performance impact of power gating individual registers. For each register, we e...