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» Data assignment and access scheduling exploration for multi-...
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CASES
2001
ACM
13 years 9 months ago
Combined partitioning and data padding for scheduling multiple loop nests
With the widening performance gap between processors and main memory, efficient memory accessing behavior is necessary for good program performance. Loop partition is an effective...
Zhong Wang, Edwin Hsing-Mean Sha, Xiaobo Hu
JUCS
2000
120views more  JUCS 2000»
13 years 5 months ago
Execution and Cache Performance of the Scheduled Dataflow Architecture
: This paper presents an evaluation of our Scheduled Dataflow (SDF) Processor. Recent focus in the field of new processor architectures is mainly on VLIW (e.g. IA-64), superscalar ...
Krishna M. Kavi, Joseph Arul, Roberto Giorgi
MICRO
2002
IEEE
143views Hardware» more  MICRO 2002»
13 years 10 months ago
Effective instruction scheduling techniques for an interleaved cache clustered VLIW processor
Clustering is a common technique to overcome the wire delay problem incurred by the evolution of technology. Fully-distributed architectures, where the register file, the functio...
Enric Gibert, F. Jesús Sánchez, Anto...
DAC
2008
ACM
13 years 7 months ago
Application mapping for chip multiprocessors
The problem attacked in this paper is one of automatically mapping an application onto a Network-on-Chip (NoC) based chip multiprocessor (CMP) architecture in a locality-aware fas...
Guangyu Chen, Feihui Li, Seung Woo Son, Mahmut T. ...
ICIW
2009
IEEE
14 years 2 days ago
An Adaptive Scheduling Policy for Staged Applications
The performance of Web servers and application servers is a crucial factor for the success of the underlying business activity. Current commercial servers (such as Apache and Micr...
Mohammad Shadi Al Hakeem, Jan Richling, Gero M&uum...