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2010
Tsinghua U.
13 years 3 months ago
Decomposable and responsive power models for multicore processors using performance counters
Abstract—Power modeling based on performance monitoring counters (PMCs) has attracted the interest of many researchers since it become a quick approach to understand and analyse ...
Ramon Bertran, Marc González, Xavier Martor...
ISCA
2010
IEEE
247views Hardware» more  ISCA 2010»
13 years 8 months ago
An integrated GPU power and performance model
GPU architectures are increasingly important in the multi-core era due to their high number of parallel processors. Performance optimization for multi-core processors has been a c...
Sunpyo Hong, Hyesoon Kim
SIGOPS
2010
179views more  SIGOPS 2010»
12 years 11 months ago
Online cache modeling for commodity multicore processors
Modern chip-level multiprocessors (CMPs) contain multiple processor cores sharing a common last-level cache, memory interconnects, and other hardware resources. Workloads running ...
Richard West, Puneet Zaroo, Carl A. Waldspurger, X...
IPPS
2007
IEEE
13 years 11 months ago
SWARM: A Parallel Programming Framework for Multicore Processors
Due to fundamental physical limitations and power constraints, we are witnessing a radical change in commodity microprocessor architectures to multicore designs. Continued perform...
David A. Bader, Varun Kanade, Kamesh Madduri
EXPCS
2007
13 years 8 months ago
Measuring performance, power, and temperature from real processors
The modeling of power and thermal behavior of processors requires challenging validation processes, which may be complex and undependable. In order to ameliorate some of the diffi...
Francisco J. Mesa-Martinez, Michael Brown, Joseph ...