34 search results - page 1 / 7 » Deductive Fault Simulation for Asynchronous Sequential Circu... |
DSD
2009
IEEE
13 years 11 months ago
2009
IEEE
ATS
2000
IEEE
13 years 9 months ago
2000
IEEE
At very high frequencies, the major potential of asynchronous circuits is absence of clock skew and, through that, better exploitation of relative timing relations. This paper pre...
ICCAD
1997
IEEE
13 years 9 months ago
1997
IEEE
A deductive technique is presented that uses voltage testing for the diagnosis of single bridging faults between two gate input or output lines and is applicable to combinational ...
VLSID
2002
IEEE
14 years 5 months ago
2002
IEEE
We give an algorithm to model any given multiple stuck-at fault as a single stuck-at fault. The procedure requires insertion of at most ? ? ? modeling gates, when the multiplicity...
DSD
2005
IEEE
13 years 10 months ago
2005
IEEE
Current paper presents new alternatives for accelerating the task of fault simulation for sequential circuits by hardware emulation on FPGA. Fault simulation is an important subta...