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DAC
1996
ACM
13 years 7 months ago
Delay Minimal Decomposition of Multiplexers in Technology Mapping
Technology mapping requires the unmapped logic network to be represented in terms of base functions, usually two-input NORs and inverters. Technology decomposition is the step tha...
Shashidhar Thakur, D. F. Wong, Shankar Krishnamoor...
FPGA
2001
ACM
145views FPGA» more  FPGA 2001»
13 years 8 months ago
Simultaneous logic decomposition with technology mapping in FPGA designs
Conventional technology mapping algorithms for SRAM-based Field Programmable Gate Arrays (FPGAs) are normally carried out on a fixed logic decomposition of a circuit. The impact o...
Gang Chen, Jason Cong
FPGA
1995
ACM
105views FPGA» more  FPGA 1995»
13 years 7 months ago
On Nominal Delay Minimization in LUT-based FPGA Technology Mapping
We study the nominal delay minimization problem in LUTbased FPGA technologymapping, where interconnect delay is assumed proportionalto net fanout size. We prove that the delay-opt...
Jason Cong, Yuzheng Ding
DAC
1996
ACM
13 years 7 months ago
A Boolean Approach to Performance-Directed Technology Mapping for LUT-Based FPGA Designs
Abstract -- This paper presents a novel, Boolean approach to LUTbased FPGA technology mapping targeting high performance. As the core of the approach, we have developed a powerful ...
Christian Legl, Bernd Wurth, Klaus Eckl