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» Delay modeling and static timing analysis for MTCMOS circuit...
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ICCD
2004
IEEE
128views Hardware» more  ICCD 2004»
14 years 1 months ago
Static Transition Probability Analysis Under Uncertainty
Deterministic gate delay models have been widely used to find the transition probabilities at the nodes of a circuit for calculating the power dissipation. However, with progress...
Siddharth Garg, Siddharth Tata, Ravishankar Arunac...
ICCAD
2002
IEEE
76views Hardware» more  ICCAD 2002»
14 years 1 months ago
WTA: waveform-based timing analysis for deep submicron circuits
Existing static timing analyzers make several assumptions about circuits, implicitly trading off accuracy for speed. In this paper we examine the validity of these assumptions, no...
Larry McMurchie, Carl Sechen
DAC
2004
ACM
14 years 5 months ago
Worst-case circuit delay taking into account power supply variations
Current Static Timing Analysis (STA) techniques allow one to verify the timing of a circuit at different process corners which only consider cases where all the supplies are low o...
Dionysios Kouroussis, Rubil Ahmadi, Farid N. Najm
DATE
2009
IEEE
126views Hardware» more  DATE 2009»
13 years 11 months ago
On hierarchical statistical static timing analysis
— Statistical static timing analysis deals with the increasing variations in manufacturing processes to reduce the pessimism in the worst case timing analysis. Because of the cor...
Bing Li, Ning Chen, Manuel Schmidt, Walter Schneid...
ICCAD
2000
IEEE
169views Hardware» more  ICCAD 2000»
13 years 9 months ago
Transistor-Level Timing Analysis Using Embedded Simulation
A high accuracy system for transistor-level static timing analysis is presented. Accurate static timing verification requires that individual gate and interconnect delays be accu...
Pawan Kulshreshtha, Robert Palermo, Mohammad Morta...