43 search results - page 1 / 9 » Delay-Insensitive Interface Specification and Synthesis |
DATE
2000
IEEE
13 years 9 months ago
2000
IEEE
ICCAD
1999
IEEE
13 years 9 months ago
1999
IEEE
Deep submicron technology calls for new design techniques, in which wire and gate delays are accounted to have equal or nearly equal effect on circuit behaviour. Asynchronous spee...
VLSID
2002
IEEE
14 years 5 months ago
2002
IEEE
Deep submicron technology calls for new design techniques, in which wire and gate delays are accounted to have equal or nearly equal effect on circuit behavior. Asynchronous speed...
ASYNC
1998
IEEE
13 years 9 months ago
1998
IEEE
We present the XDI Model for specifying delay-insensitive circuits, that is, reactive systems that correctly exchange signals with their environment in spite of unknown delays inc...
ACSD
2004
IEEE
13 years 8 months ago
2004
IEEE
Abstract. A delay-insensitive module communicates with its environment through wires of unbounded delay. To avoid transmission interference, the absorption of a signal transition m...