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IEEEPACT
2009
IEEE
13 years 12 months ago
Analytical Modeling of Pipeline Parallelism
Parallel programming is a requirement in the multi-core era. One of the most promising techniques to make parallel programming available for the general users is the use of parall...
Angeles G. Navarro, Rafael Asenjo, Siham Tabik, Ca...
APCSAC
2000
IEEE
13 years 9 months ago
Cost/Performance Tradeoff of n-Select Square Root Implementations
Hardware square-root units require large numbers of gates even for iterative implementations. In this paper, we present four low-cost high-performance fullypipelined n-select impl...
Wanming Chu, Yamin Li
EUROPAR
2007
Springer
13 years 9 months ago
An Evaluation of Parallelization Concepts for Baseline-Profile Compliant H.264/AVC Decoders
Due to the increasing performance requirements of decoding H.264/AVC in HDTV or larger resolutions, new approaches are necessary to enable real-time processing. According to the cu...
Klaus Schöffmann, Markus Fauster, Oliver Lamp...
VIS
2007
IEEE
149views Visualization» more  VIS 2007»
14 years 6 months ago
Time Dependent Processing in a Parallel Pipeline Architecture
Pipeline architectures provide a versatile and efficient mechanism for constructing visualizations, and they have been implemented in numerous libraries and applications over the p...
John Biddiscombe, Berk Geveci, Ken Martin, Kenn...
IPPS
2002
IEEE
13 years 10 months ago
Efficient Pipelining of Nested Loops: Unroll-and-Squash
The size and complexity of current custom VLSI have forced the use of high-level programming languages to describe hardware, and compiler and synthesis technology bstract designs ...
Darin Petkov, Randolph E. Harr, Saman P. Amarasing...