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FPL
2007
Springer
120views Hardware» more  FPL 2007»
13 years 10 months ago
Design Methodology and Trade-offs Analysis for Parameterized Dynamically Reconfigurable Processor Arrays
In this paper, we propose a Dynamically Reconfigurable Processor Array (DRPA) generator which can generate various types of DRPAs. Our target DRPA architecture is fully parameter...
Yohei Hasegawa, Hideharu Amano
DAC
2000
ACM
14 years 5 months ago
MorphoSys: case study of a reconfigurable computing system targeting multimedia applications
In this paper, we present a case study for the design, programming and usage of a reconfigurable system-on-chip, MorphoSys, which is targeted at computation-intensive applications...
Hartej Singh, Guangming Lu, Eliseu M. Chaves Filho...
IPPS
2005
IEEE
13 years 10 months ago
Accelerating Scientific Applications with the SRC-6 Reconfigurable Computer: Methodologies and Analysis
Reconfigurable computing offers the promise of performing computations in hardware to increase performance and efficiency while retaining much of the flexibility of a software sol...
Melissa C. Smith, Jeffrey S. Vetter, Xuejun Liang
ICCAD
2003
IEEE
190views Hardware» more  ICCAD 2003»
14 years 1 months ago
IDAP: A Tool for High Level Power Estimation of Custom Array Structures
—While array structures are a significant source of power dissipation, there is a lack of accurate high-level power estimators that account for varying array circuit implementat...
Mahesh Mamidipaka, Kamal S. Khouri, Nikil D. Dutt,...
DAC
2002
ACM
14 years 5 months ago
Exploiting operation level parallelism through dynamically reconfigurable datapaths
Increasing non-recurring engineering (NRE) and mask costs are making it harder to turn to hardwired Application Specific Integrated Circuit (ASIC) solutions for high performance a...
Zhining Huang, Sharad Malik