1084 search results - page 1 / 217 » Design and Evaluation of a Selective Compressed Memory Syste... |
ICCD
1999
IEEE
13 years 8 months ago
1999
IEEE
This research explores any potential for an on-chip cache compression which can reduce not only cache miss ratio but also miss penalty, if main memory is also managed in compresse...
TVLSI
2002
13 years 4 months ago
2002
We propose a technique for reducing the energy spent in the memory-processor interface of an embedded system during the execution of firmware code. The method is based on the idea ...
TVLSI
2010
12 years 11 months ago
2010
Abstract--Higher circuit densities in system-on-chip (SOC) designs have led to drastic increase in test data volume. Larger test data size demands not only higher memory requiremen...
SBACPAD
2003
IEEE
13 years 9 months ago
2003
IEEE
In this paper, we reevaluate the use of adaptive compressed caching to improve system performance through the reduction of accesses to the backing stores. We propose a new adaptab...
EUROMICRO
1999
IEEE
13 years 8 months ago
1999
IEEE
This research proposes a selective compressed memory system (SCMS) focusing on a compressed cache architecture, in which only data blocks with good compression efficiency are comp...