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» Design and Implementation of a High-Performance Microprocess...
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ISCA
2008
IEEE
113views Hardware» more  ISCA 2008»
13 years 11 months ago
A Two-Level Load/Store Queue Based on Execution Locality
Multicore processors have emerged as a powerful platform on which to efficiently exploit thread-level parallelism (TLP). However, due to Amdahl’s Law, such designs will be incr...
Miquel Pericàs, Adrián Cristal, Fran...
VLDB
1999
ACM
145views Database» more  VLDB 1999»
13 years 9 months ago
DBMSs on a Modern Processor: Where Does Time Go?
Recent high-performance processors employ sophisticated techniques to overlap and simultaneously execute multiple computation and memory operations. Intuitively, these techniques ...
Anastassia Ailamaki, David J. DeWitt, Mark D. Hill...