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» Design and analysis of optimal adaptive de-jitter buffers
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COMCOM
2004
112views more  COMCOM 2004»
13 years 4 months ago
Design and analysis of optimal adaptive de-jitter buffers
In order to transfer voice or some other application requiring real-time delivery over a packet network, we need a de-jitter buffer to eliminate delay jitters. An important design...
Gagan L. Choudhury, Robert G. Cole
TC
2008
13 years 4 months ago
Adaptive Channel Buffers in On-Chip Interconnection Networks - A Power and Performance Analysis
On-chip interconnection networks (OCINs) have emerged as a modular and scalable solution for wire delay constraints in deep submicron VLSI design. OCIN research has shown that the ...
Avinash Karanth Kodi, Ashwini Sarathy, Ahmed Louri
ANCS
2007
ACM
13 years 8 months ago
Design of adaptive communication channel buffers for low-power area-efficient network-on-chip architecture
Network-on-Chip (NoC) architectures provide a scalable solution to the wire delay constraints in deep submicron VLSI designs. Recent research into the optimization of NoC architec...
Avinash Karanth Kodi, Ashwini Sarathy, Ahmed Louri
DSN
2002
IEEE
13 years 9 months ago
Optimizing Buffer Management for Reliable Multicast
Reliable multicast delivery requires that a multicast message be received by all members in a group. Hence certain or all members need to buffer messages for possible retransmissi...
Zhen Xiao, Kenneth P. Birman, Robbert van Renesse
ICC
2007
IEEE
140views Communications» more  ICC 2007»
13 years 10 months ago
Performance Analysis of Adaptively-Routed Wormhole-Switched Networks with Finite Buffers
—The use of adaptively-routed wormhole switched k-ary n-cubes has been motivated by the high path diversity provided by the rich topology of this family of interconnection networ...
Nasser Alzeidi, Mohamed Ould-Khaoua, Lewis M. Mack...