82 search results - page 1 / 17 » Design of Asynchronous Controllers with Delay Insensitive In... |
VLSID
2002
IEEE
14 years 4 months ago
2002
IEEE
Deep submicron technology calls for new design techniques, in which wire and gate delays are accounted to have equal or nearly equal effect on circuit behavior. Asynchronous speed...
FUIN
2007
13 years 4 months ago
2007
Abstract. Josephs and Udding’s DI-Algebra offers a convenient way of specifying and verifying designs that must rely upon delay-insensitive signalling between modules (asynchrono...
DSD
2009
IEEE
13 years 2 months ago
2009
IEEE
Abstract--The implementation of an efficient result forwarding unit for asynchronous processors faces the problem of the inherent lack of synchronisation between result producer an...
ICCAD
1999
IEEE
13 years 8 months ago
1999
IEEE
Deep submicron technology calls for new design techniques, in which wire and gate delays are accounted to have equal or nearly equal effect on circuit behaviour. Asynchronous spee...
ASYNC
2005
IEEE
13 years 10 months ago
2005
IEEE
Unprotected cryptographic hardware is vulnerable to a side-channel attack known as Differential Power Analysis (DPA). This attack exploits data-dependent power consumption of a co...