Programming specialized network processors (NPU) is inherently difficult. Unlike mainstream processors where architectural features such as out-of-order execution and caches hide ...
This paper presents a model for instruction-level distributed computing that allows the implementation of scalable chip multiprocessors. Based on explicit microthreading it serves ...
The proliferation of mobile and pervasive computing devices has brought energy constraints into the limelight, together with performance considerations. Energy-conscious design is...
Ning An, Anand Sivasubramaniam, Narayanan Vijaykri...
Technology advancements have enabled the integration of large on-die embedded DRAM (eDRAM) caches. eDRAM is significantly denser than traditional SRAMs, but must be periodically r...
Chris Wilkerson, Alaa R. Alameldeen, Zeshan Chisht...
We propose a novel tool, called objSampler, with which users can record and recall “encounters” with objects in ubiquitous computing environments. We encounter various things,...
Jun'ichi Yura, Hideaki Ogawa, Taizo Zushi, Jin Nak...