55 search results - page 11 / 11 » Design of mixed gates for leakage reduction |
VLSID
2002
IEEE
14 years 6 months ago
2002
IEEE
Power gating is emerging as a viable solution to reduction of leakage current. However, power gated circuits are different from the conventional designs in the sense that a power-...
SOCC
2008
IEEE
13 years 12 months ago
2008
IEEE
First-in first-out (FIFO) memories are widely used in SoC for data buffering and flow control. In this paper, a robust ultra-low power asynchronous FIFO memory is proposed. With s...
FPGA
2005
ACM
13 years 11 months ago
2005
ACM
Modern FPGA architectures provide ample routing resources so that designs can be routed successfully. The routing architecture is designed to handle versatile connection configur...
ICCD
2005
IEEE
14 years 2 months ago
2005
IEEE
: Power consumption in datapath modules due to redundant switching is an important design concern for high-performance applications. Operand isolation schemes are adopted to reduce...
EUROSYS
2008
ACM
14 years 2 months ago
2008
ACM
Non-uniform utilization of functional units in combination with hardware mechanisms such as clock gating leads to different power consumptions in different parts of a processor ch...