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» Design techniques for low-power systems
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ISCAS
1999
IEEE
106views Hardware» more  ISCAS 1999»
13 years 9 months ago
Multi-objective design strategy for high-level low power design of DSP systems
High-level power design presents a complex, multiobjective problem that involves the simultaneous optimisation of competing criteria such as speed, area and power. It is difficult...
Mark S. Bright, Tughrul Arslan
RTSS
1998
IEEE
13 years 9 months ago
Synthesis Techniques for Low-Power Hard Real-Time Systems on Variable Voltage Processors
The energy efficiency of systems-on-a-chip can be much improved if one were to vary the supply voltage dynamically at run time. In this paper we describe the synthesis of systems-...
Inki Hong, Gang Qu, Miodrag Potkonjak, Mani B. Sri...
ISLPED
2003
ACM
149views Hardware» more  ISLPED 2003»
13 years 10 months ago
Elements of low power design for integrated systems
The increasing prominence of portable systems and the need to limit power consumption and hence, heat dissipation in very high density VLSI chips have led to rapid and innovative ...
Sung-Mo Kang
VLSID
2004
IEEE
128views VLSI» more  VLSID 2004»
14 years 5 months ago
A Compact Low-Power Buffer Amplifier with Dynamic Bias Control Technique
This work presents a novel dynamic bias control technique to verify the circuit performance of the lowpower rail-to-rail input/output buffer amplifier, which can be operating in s...
Chih-Jen Yen, Wen-Yaw Chung, Mely Chen Chi
ISLPED
2005
ACM
103views Hardware» more  ISLPED 2005»
13 years 10 months ago
A non-uniform cache architecture for low power system design
This paper proposes a non-uniform cache architecture for reducing the power consumption of memory systems. The nonuniform cache allows having different associativity values (i.e.,...
Tohru Ishihara, Farzan Fallah