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JEI
2000
133views more  JEI 2000»
13 years 4 months ago
Low complexity block motion estimation using morphological-based feature extraction and XOR operations
Motion estimation is a temporal image compression technique, where an n x n block of pixels in the current frame of a video sequence is represented by a motion vector with respect...
Thinh M. Le, R. Mason, Sethuraman Panchanathan
JSA
2010
158views more  JSA 2010»
12 years 11 months ago
Scalable mpNoC for massively parallel systems - Design and implementation on FPGA
The high chip-level integration enables the implementation of large-scale parallel processing architectures with 64 and more processing nodes on a single chip or on an FPGA device...
Mouna Baklouti, Yassine Aydi, Philippe Marquet, Je...
IJCSA
2008
117views more  IJCSA 2008»
13 years 4 months ago
Altivec Vector Unit Customization for Embedded Systems
Vector extensions for general purpose processors are an efficient feature to address the growing performance demand of multimedia and computer vision applications. Embedded proces...
Tarik Saidani, Joel Falcou, Lionel Lacassagne, Sam...
ESTIMEDIA
2007
Springer
13 years 8 months ago
Still Image Processing on Coarse-Grained Reconfigurable Array Architectures
Due to the increasing demands on efficiency, performance and flexibility reconfigurable computational architectures are very promising candidates in embedded systems design. Recent...
Matthias Hartmann, Vasileios (Vassilis) Pantazis, ...
CONCURRENCY
2004
151views more  CONCURRENCY 2004»
13 years 4 months ago
User transparency: a fully sequential programming model for efficient data parallel image processing
Although many image processing applications are ideally suited for parallel implementation, most researchers in imaging do not benefit from high performance computing on a daily b...
Frank J. Seinstra, Dennis Koelma